Performance Evaluation of Cascaded Multilevel STATCOM using Hardware-in-the-Loop (HiL) Test based on Real-Time Digital Simulator (RTDS)

Lihua Li, Lin Xu, Yang Han


The cascaded H-bridge multilevel converter topology has been increasingly utilized for reactive power compensation purposes for the medium voltage distribution systems. The static synchronous compensators (STATCOMs) or static var generators (SVGs), are difficult to be tested in the field due to the unpredicted network operation conditons. This paper presents an effective method to test the STATCOM/SVG controllers based on the real-time digital simulator (RTDS), which has the benefit of easy implementation, low cost, online parameter tuning and high efficiency. The experimental results of STATCOM/SVG under steady state and dynamic conditions are presented to verify the proposed approach, which can be widely applied in other grid-interfaced power electronic converters and smart grid applications.


static synchronous compensator, STATCOM, SVG, hardware-in-the-loop, RTDS

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TELKOMNIKA Telecommunication, Computing, Electronics and Control
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