A Customized Reconfiguration Controller with Remote Direct ICAP Access for Dynamically Reconfigurable Platform
Tze Hon Tan, Chia Yee Ooi, Muhammad Nadzir Marsono
As FPGA dynamic partial reconﬁguration getting into mainstream, design of reconﬁguration controller becomes an active research. Most of the existing reconﬁguration controllers support only the loading of partial bitstream into conﬁguration memory without allowing user to access ICAP directly, which can provide user higher controllability over the reconﬁgurable device. This paper presents the architecture of a customized reconﬁguration controller with remote direct ICAP access. Remote direct ICAP access allows user to conﬁgure or readback device internal registers, which offer user higher controllability over the reconﬁgurable device. Additionally, the proposed reconﬁguration controller achieved at least 3.19 Gbps of reconﬁguration throughput, which reduces the platform service downtime during dynamic partial reconﬁguration. In order to reduce the latency and transmission overhead of remote functional update, partial bitstream is compressed with run-length encoding before transmission.